/*
 * Copyright (C) 2020 MediaTek Inc.
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 */

#ifndef __MDP_BASE_H__
#define __MDP_BASE_H__

#define MDP_HW_CHECK

#include "mach/mt_iommu.h"

static u32 mdp_engine_port[ENGBASE_COUNT] = {
	0, // ENGBASE_MMSYS_CONFIG,
	M4U_PORT_L2_MDP_RDMA0, // ENGBASE_MDP_RDMA0,
	M4U_PORT_L3_MDP_RDMA1, // ENGBASE_MDP_RDMA1,
	M4U_PORT_L2_MDP_RDMA2, // ENGBASE_MDP_RDMA2,
	M4U_PORT_L3_MDP_RDMA3, // ENGBASE_MDP_RDMA3,
	0, // ENGBASE_MDP_FG0,
	0, // ENGBASE_MDP_FG1,
	0, // ENGBASE_MDP_AAL0,
	0, // ENGBASE_MDP_AAL1,
	0, // ENGBASE_MDP_AAL2,
	0, // ENGBASE_MDP_AAL3,
	0, // ENGBASE_MDP_HDR0,
	0, // ENGBASE_MDP_HDR1,
	0, // ENGBASE_MDP_RSZ0,
	0, // ENGBASE_MDP_RSZ1,
	0, // ENGBASE_MDP_RSZ2,
	0, // ENGBASE_MDP_RSZ3,
	M4U_PORT_L2_MDP_WROT0, // ENGBASE_MDP_WROT0,
	M4U_PORT_L3_MDP_WROT1, // ENGBASE_MDP_WROT1,
	M4U_PORT_L2_MDP_WROT2, // ENGBASE_MDP_WROT2,
	M4U_PORT_L3_MDP_WROT3, // ENGBASE_MDP_WROT3,
	0, // ENGBASE_MDP_TDSHP0,
	0, // ENGBASE_MDP_TDSHP1,
	0, // ENGBASE_MDP_TDSHP2,
	0, // ENGBASE_MDP_TDSHP3,
	0, // ENGBASE_MDP_TCC0,
	0, // ENGBASE_MDP_TCC1,
	0, // ENGBASE_MDP_TCC2,
	0, // ENGBASE_MDP_TCC3,
	0, // ENGBASE_MDP_COLOR0,
	0, // ENGBASE_MDP_COLOR1,
	0, // ENGBASE_MMSYS_MUTEX,
	0, // ENGBASE_ISP_MSFDL,
	0, // ENGBASE_ISP_MSS,
	0, // ENGBASE_ISP_MFB,
	0, // ENGBASE_ISP_DIP_A0,
	0, // ENGBASE_ISP_DIP_A1,
	0, // ENGBASE_ISP_DIP_A7,
	0, // ENGBASE_IMGSYS2_CONFIG,
	0, // ENGBASE_ISP_DIP_B0,
	0, // ENGBASE_ISP_DIP_B1,
	0, // ENGBASE_ISP_DIP_B7,
	0, // ENGBASE_ISP_WPE_A,
	0, // ENGBASE_ISP_WPE_B,
};

static u32 mdp_base[ENGBASE_COUNT] = {
	[ENGBASE_MMSYS_CONFIG] = 0x1f000000,
	[ENGBASE_MDP_RDMA0] = 0x1f006000,
	[ENGBASE_MDP_RDMA1] = 0x1f007000,
	[ENGBASE_MDP_RDMA2] = 0x1f008000,
	[ENGBASE_MDP_RDMA3] = 0x1f009000,
	[ENGBASE_MDP_FG0] = 0x1f00a000,
	[ENGBASE_MDP_FG1] = 0x1f00b000,
	[ENGBASE_MDP_AAL0] = 0x1f00c000,
	[ENGBASE_MDP_AAL1] = 0x1f00d000,
	[ENGBASE_MDP_AAL2] = 0x1f00e000,
	[ENGBASE_MDP_AAL3] = 0x1f00f000,
	[ENGBASE_MDP_HDR0] = 0x1f010000,
	[ENGBASE_MDP_HDR1] = 0x1f011000,
	[ENGBASE_MDP_RSZ0] = 0x1f012000,
	[ENGBASE_MDP_RSZ1] = 0x1f013000,
	[ENGBASE_MDP_RSZ2] = 0x1f014000,
	[ENGBASE_MDP_RSZ3] = 0x1f015000,
	[ENGBASE_MDP_WROT0] = 0x1f016000,
	[ENGBASE_MDP_WROT1] = 0x1f017000,
	[ENGBASE_MDP_WROT2] = 0x1f018000,
	[ENGBASE_MDP_WROT3] = 0x1f019000,
	[ENGBASE_MDP_TDSHP0] = 0x1f01a000,
	[ENGBASE_MDP_TDSHP1] = 0x1f01b000,
	[ENGBASE_MDP_TDSHP2] = 0x1f01c000,
	[ENGBASE_MDP_TDSHP3] = 0x1f01d000,
	[ENGBASE_MDP_TCC0] = 0x1f01e000,
	[ENGBASE_MDP_TCC1] = 0x1f01f000,
	[ENGBASE_MDP_TCC2] = 0x1f020000,
	[ENGBASE_MDP_TCC3] = 0x1f021000,
	[ENGBASE_MDP_COLOR0] = 0x1f02c000,
	[ENGBASE_MDP_COLOR1] = 0x1f02d000,
	[ENGBASE_MMSYS_MUTEX] = 0x1f001000,
	[ENGBASE_ISP_MSFDL] = 0x15010000,
	[ENGBASE_ISP_MSS] = 0x15012000,
	[ENGBASE_ISP_MFB] = 0x15020000,
	[ENGBASE_ISP_DIP_A0] = 0x15021000,
	[ENGBASE_ISP_DIP_A1] = 0x15022000,
	[ENGBASE_ISP_DIP_A7] = 0x15028000,
	[ENGBASE_IMGSYS2_CONFIG] = 0x15820000,
	[ENGBASE_ISP_DIP_B0] = 0x15821000,
	[ENGBASE_ISP_DIP_B1] = 0x15822000,
	[ENGBASE_ISP_DIP_B7] = 0x15828000,
	[ENGBASE_ISP_WPE_A] = 0x15011000,
	[ENGBASE_ISP_WPE_B] = 0x15811000,
};

#endif
